Power consumed by a display panel can be a significant part of a computer system's overall power consumption. The power required by the display panel can become an even greater factor of overall power during periods of time when the computer system is idle. For example, in a notebook computer, the panel power can be 15-20% of idle power. In tablet systems the percentage of idle power used for panel power can be 60% or higher. A small percentage of this power is consumed in a display interface connecting a graphics processor to the display panel. For example, exemplary display interfaces, such as embedded DisplayPort (eDP) and low-voltage differential signaling (LVDS) interfaces, consume approximately 200 mW per lane and 120-150 mw for both channels in dual-channel mode, respectively. A timing controller chip (TCON) on the panel also consumes relatively little power. By far the largest amount of power consumed in a display panel are in the row/column drivers (that enable TFT gates) and source drivers (that set the sub-pixel primary color value) that charge the storage capacitors in the thin-film-transfer (TFT) elements of an LCD matrix.
In one exemplary display, each individual pixel of a display panel comprises a storage capacitor. Each storage capacitor comprises a pair of transparent electrodes with a layer of liquid crystal between the transparent electrodes. LCD drivers control and manage the display of data in the display panel as defined by the charges stored in the individual storage capacitors of the matrix of pixels. Because the charge of a capacitor will naturally decay over time, each pixel storage capacitor must be recharged by the LCD drivers to maintain the current state of the LCD pixel.
Since many idle system scenarios run the display continuously for the purpose of providing a viewer with a continuous static visual experience, e.g., while reading a webpage, text document, multi-media document, ebook reader program, etc., what is needed are ways to decrease panel power for idle static screen cases. Previous attempts to reduce panel power by reducing the refresh rate have failed to achieve a satisfactory visual experience below 40 Hz due to visual flicker artifacts, especially in fluorescent lighting, where a beat interference frequency can create a visually disturbing “strobing” effect as the LCD display panel appears to pulse. This is due to the sawtooth decay of the smaller storage capacitance used in modern LCDs. Smaller storage capacitance is necessary in order to provide low latency (e.g., fast charge times) for displaying high motion content. Changing to larger storage capacitance would reduce this effect, but at the cost of increased latency, and higher source driver power, which is unacceptable.